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Addendum for PCN 2004-018-A BTS 5440 G
Addendum for PCN-Datasheet 2004-018-A: BTS 5440 G
This Addendum and PCN-Datasheet refers to the PCN 2004-018-A: "Minor datasheet adaption for BTS 5240 L, BTS 5240 G, BTS 5440 G ". The PCN-datasheet attached will be valid starting from August 2004. There are the following changes in the datasheet (on page 7): Old: Current limit adjustment threshold voltage New: Current limit adjustment threshold voltage Symbol VCLA(T-) min 2.0 typ max 4.0 Unit V Symbol VCLA(T-) min 2.6 typ max 3.6 Unit V
PCN 2004-018-A: BTS 5440G
Smart High-Side Power Switch Four Channels: 4 x 25m IntelliSense
Product Summary
Operating voltage V bb(on) Active channels On-state resistance Nominal load current Current limitation Low High RON IL(nom) IL(SCr) one 25 6.2 10 40 4,5...28 ( Loaddump: 40 V ) four parallel 6.5 13.9 m A A V
Package
P-DSO-28-19
General Description
* N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. * Providing embedded protective functions. * Extern adjustable current limitation.
Application
* * * * All types of resistive, inductive and capacitive loads C compatible high-side power switch with diagnostic feedback for 12 V grounded loads Due to the adjustable current limitation best suitable for loads with high inrush currents, so as lamps Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
* Very low standby current * CMOS compatible input * Improved electromagnetic compatibility (EMC) * Stable behaviour at low battery voltage
Block Diagram
Vbb
IN1 IS1 IS2 IN2 CLA 1/2
IN3 IS3 IS4 IN4 CLA 3/4
Logic Channel 1 Channel 2
Protection Functions
* Reverse battery protection with external resistor * Short circuit protection * Overload protection * Current limitation * Thermal Shutdown * Overvoltage protection with external resistor * Loss of GND and loss of Vbb protection * Electrostatic discharge Protection (ESD)
Load 1
Load 2
Logic Channel 3 Channel 4
Load 3
GND
Load 4
Diagnostic Functions: IntelliSense
* Proportional load current sense ( with defined fault signal during thermal shutdown and overload ) * Additional open load detection in OFF - state * Suppressed thermal toggling of fault signal
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PCN 2004-018-A: BTS 5440G
Functional diagram
overvoltage protection internal voltage supply
logic
gate control + charge pump temperature sensor openload dedection
current limit
VBB
clamp for inductive load
OUT1
IN1 IS1
ESD
LOAD
Current sense
CLA 1/2
IN2 IS2 GND1/2
control and protection circuit of channel 2
OUT2
IN3 IS3 CLA 3/4
control and protection circuit of channel 3
OUT3
IN4 IS4 GND3/4
control and protection circuit of channel 4
OUT4
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PCN 2004-018-A: BTS 5440G
Pin definition and function Pin 1,14, 15,28 3 6 9 12 25,26,27 22,23,24 19,20,21 16,17,18 4 5 10 11 7 13 2 8 IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4 IS1 IS2 IS3 IS4 CLA 1/2 CLA 3/4 GND 1/2 GND 3/4 Diagnostic feedback 1...4 of channel 1 to 4 On state: advanced current sense with defined signal in case of overload or short circuit Off state: High on failure Current limit adjust; the current limit for channels 1/2 and 3/4 can be chosen as high ( potential < 2,6V ) or low ( potential > 3,6V ). Ground of chip 1 ( channel 1,2 ) Ground of chip 2 ( channel 3,4 ) Output 1,2,3,4 protected high-side power output of channel 1,2,3,4. Design the wiring for the max. short circuit current Symbol Vbb Function Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 4 and also for low thermal resistance Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal
Pin configuration
(top view ) V bb GND 1/2 IN 1 IS 1 IS 2 IN 2 C LA 1/2 GND 3/4 IN 3 IS 3 IS 4 IN 4 C LA 3/4 V bb 1 2 3 4 5 6 7 8 9 10 11 12 13 14
*
28 V b b 27 26 25 24 23 22 21 20 19 18 17 16 15 O U T1 O U T1 O U T1 OUT2 OUT2 OUT2 OUT3 OUT3 OUT3 OUT4 O U T4 O U T4 V bb
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PCN 2004-018-A: BTS 5440G
Maximum Ratings at Tj=25C, unless otherwise specified Parameter Supply voltage (overvoltage protection see page 6) Supply voltage for full short circuit protection;Tj = -40...150C Maximum voltage across DMOS Load dump protection 3) VLoadDump4) = VA + VS; VA = 13,5 V In = low or high; td = 400 ms; RI4) = 2 RL = 2.25 RL = 6.8 Load current (Short - circuit current, see page 7) Operating temperature range Storage temperature range Dynamical temperature rise at switching Power dissipation6) (DC), all channels active Maximal switchable inductance, single pulse Vbb=12V, T jstart=150C;
(see diagrams on page 12)
Symbol Vbb Vbb(SC) VON VLoaddump
Value 281) 282) 52
Unit V
40 53 IL Tj Tstg dT TA = 85 C Ptot ZL(s) one channel: two parallel channels: IN: VESD IS: OUT: VIN VCLA I CLA I IN
(see page 11)
IL(lim)5) -55...+150 60 1,6
A
-40...+150 C K W mH 9.8 5.2 1,0 2,0 4,0 -10...16 -10...16 5.0 5.0 -5...+10 mA V kV
IL = 6 A, EAS = 0.319 J, RL = 0 , IL = 12 A, EAS = 0.679 J, RL = 0 , Electrostatic discharge voltage
(Human Body Model)
according to ANSI EOS/ESD - S5.1 - 1993 , ESD STM5.1 - 1998
Continuous input voltage Voltage at current limit adjustment pin Current through current limit adjustment pin Current through input pin (DC) Current through sense pin (DC)
I IS
118...28 V for 100 hours 2only single pulse, R = 200 m ; L = 8 H ; R and L are describing the complete circuit impedance including L line, contact and generator impedances. 3Supply voltage higher than V bb(AZ) require an external current limit for the GND (150 resistor) and sense pin. 4R = internal resistance of the load dump test pulse generator. I 5Current limit is a protection function. Operation in current limitation is considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 6Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70m thick) copper area for V bb connection. PCB is vertical without blown air.
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PCN 2004-018-A: BTS 5440G
Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150 C, Vbb = 9...16 V, unless otherwise specified Thermal Resistance junction - soldering point1) junction - ambient2) each channel: all channels active: Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT), Tj = 25 C, IL = 5 A, Tj = 150 C, Tj = 25 C, Tj = 25 C, Nominal load current2) Ta = 85C, Tj 150C , one channel active: two channels active, per channel: four channels active, per channel: Output voltage drop limitation at small load currents VON(NL) IL = 0.5 A Output current while GND disconnected 3)
( see diagram page 12 ) (see page 13)
Symbol min. RthJS -
Values typ. 40 32 max. 25 -
Unit
K/W K/W
one channel active: RthJA
RON I L(nom) 5.7 4.0 3.1 6.2 4.4 3.4 40 2 21 42 11 5.5 25 50 13 6.5
m
each channel: each channel: two parallel channels: four parallel channels:
A
mV mA
I L(GNDhigh)
VIN = 0 V
1Soldering point is measured at Vbb-pin 2Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70m thick) copper area for V bb connection. PCB is vertical without blown air. 3not subject to production test, specified by design
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PCN 2004-018-A: BTS 5440G
Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150 C, Vbb = 9...16 V, unless otherwise specified Load Switching Capabilities and Characteristics Turn-on time1) Turn-off time 1) Slew rate on 1) Slew rate off 1) to 90% VOUT to 10% VOUT 10 to 30% VOUT , 70 to 40% VOUT , ton toff dV/dton -dV/dtoff 0.1 0.09 90 100 0.25 0.25 200 220 0.45 V/s 0.4 s RL = 12 , V bb = 12 V RL = 12 , V bb = 12 V RL = 12 , V bb = 12 V RL = 12 , V bb = 12 V Operating Parameters Operating voltage2) Overvoltage protection3) Ibb = 40 mA Standby current 4)
(see diagram on page 13)
Symbol min.
Values typ. max.
Unit
Vbb(on) Vbb(AZ) I bb(off)
4.5 41
47
28 52
V
A 10 15 40
Tj = -40...+25 C, VIN = 0 V Tj = 150 C
1See timing diagram on page 14. 218V...28V for 100 hours 3Supply voltages higher than V bb(AZ) require an external current limit for the status pin and GND pin (e.g. 150). See also VOut(CL) in table of protection functions and circuit diagram on page 11. 4Measured with load; for the whole device; all channels off.
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PCN 2004-018-A: BTS 5440G
Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150 C, Vbb = 9...16 V, unless otherwise specified Operating Parameters Off-State output current (included in Ibb(off) ) VIN = 0 V, each channel Operating current 1) VIN = 5 V, per active channel Protection Functions2) Current limit, ( see timing diagrams, page 15 ) Low level; if potential at CLA = high High level; if potential at CLA = low Current limit adjustment threshold voltage Repetitive short circuit current limit Tj = Tjt (see timing diagrams on page 15) High level one active channel: two active channels 3): Low level one active channel: two active channels 3): Initial short circuit shutdown time Tj,start = 25C ; Vbb = 13,5 V IL = 40 mA Thermal overload trip temperature Thermal hysteresis
1Add I , if I > 0 IS IS 2Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 3At the beginning of the short circuit the double current is possible for a short time. 4If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VOut(CL) .
Symbol min. IL(off) IGND -
Values typ. 1.5 1.6 max. 8 4
Unit
A mA
I L(LIM) 7 40 VCLA(T-) VCLA(T+) I L(SCr) t off(SC) VOut(CL) T jt Tjt 150 40 40 7 7 3.5 0.75 -15 170 10 2.0 11 50 14 60 4.0
A
V A
low level: high level:
ms V C K
Output clamp (inductive load switch off) 4)
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PCN 2004-018-A: BTS 5440G
Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150 C, Vbb = 9...16 V, unless otherwise specified Diagnostic Characteristics Open load detection voltage Internal output pull down1) VOUT = 13.5 V Current sense ratio, static on-condition kILIS = IL :IIS IL = 0.5 A IL = 3 A IL = 6 A Sense signal in case of fault-conditions 2) in off-state Current saturation of sense fault signal Sense signal delay after thermal shutdown3) Current sense output voltage limitation IIS = 0 , IL = 5 A Current sense leakage/offset current VIN = 5 V, IL = 0 , VIS = 0 Current sense settling time to IIS static 10% after positive input slope 4) , IL = 0 to 5A Current sense settling time to IIS static 10% after change of load current4) , IL = 2.5 to 5A t slc(IS) 300 t son(IS) 400 s I IS(LH) 5 A I fault t delay(fault) VIS(lim) 4 5.4 6.5 1.2 7.3 mA ms V kILIS 4640 4900 4900 Vfault 5 5800 5400 5350 6.2 6960 5900 5800 7.5 V VOUT(OL) ROUT(PD) 2 11 3.2 23 4.4 35 V k Symbol min. Values typ. max. Unit
1In case of floating output, the status doesnt show open load. 2Fault condition means output voltage exceeds open load detection voltage V than the restart of the switch ( see diagram on page 16 ). 4not subject to production test, specified by design
OUT(OL) 3In the case of thermal shutdown the V fault signal remains for t delay(fault) longer
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PCN 2004-018-A: BTS 5440G
Electrical Characteristics Parameter at Tj = -40...+150 C, Vbb = 9...16 V, unless otherwise specified Diagnostic Characteristics Status invalid after negative input slope Status invalid after positive input slope with open load Input Feedback1) Input resistance (see circuit page 11) Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Off state input current VIN = 0.4 V On state input current VIN = 5 V Reverse Battery2) Reverse battery voltage Drain-source diode voltage (VOUT > Vbb) Tj = 150 C, Ibb = -10 mA -Vbb -VON 330 27 V mV I IN(on) 20 50 90 RI VIN(T+) VIN(T-) V IN(T) I IN(off) 2.0 1.0 3 3.5 0.5 5.5 2.4 40 A k V td(SToff) td(STOL) 1.2 20 ms s Symbol min. Values typ. max. Unit
1If ground resistors R GND are used, add the voltage drop across these resistor. 2Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and status currents have to be limited. (see max. ratings page 4 )
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PCN 2004-018-A: BTS 5440G
Truth Table - for each of the four channels Input level Normal Operation Current Limitation 2) Short circuit to GND Overtemperature Short circuit to Vbb Open load
L = " Low" Level
Output level L Vbb Vbb L L L L Vbb Vbb >Vout(OL) Vbb
Diagnostic output Z 1) I IS = IL / kilis Vfault Z1) Vfault Z1) Vfault Vfault < IIS = IL / kilis3) Vfault Z1)
L H H L H L H L H L H
Z = high impedance, potential depends on external circuit H = "High" Level Vfault = 5V typ., constant voltage independent of external sense resistor. Parallel switching of channels is possible by connecting the inputs and outputs parallel. The current sense ouputs have to be connected with a single sense resistor. Terms
Ibb V bb I IN1 I IN2 I IS1 V V IN1 IN2 I IS2 V V IS2 IS1 3 6 4 5 7 Leadframe IN1 IN2 IS1 IS2 CLA1/2 GND1/2 2 I GND V OUT2 V bb OUT1 PROFET OUT2 22 23 24 25 26 27 V ON2 I L1 I IS3 VIN3 V IN4 V OUT1 I IS4 V V IS4 IS3 V ON1 V bb Leadframe I IN3 I IN4 9 12 10 11 13 IN3 IN4 IS3 IS4 CLA3/4 GND3/4 8 I GND V OUT4 Vbb OUT3 PROFET OUT4 16 17 18 19 20 21 V ON4 I L3 V ON3
I L2
I L4 V OUT3
V CLA1/2
V CLA3/4
Leadframe (Vbb ) is connected to pin 1, 14, 15, 28 1L-potential by using a sense resistor 2Current limitation is only possible while the device is switched on. 3Low ohmic short to V may reduce the output current I and therefore also the sense current I . bb L IS
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PCN 2004-018-A: BTS 5440G
Input circuit ( ESD protection ), IN1...IN4
R
IN
I
Inductive and overvoltage output clamp, OUT1...OUT4
+Vbb
V Z
ESD-ZD I
GND
I
I
OUT
V OUT
The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
GND
Power GND
Sense-Status output, IS1...IS4
ON-State: Normal operation: IS = IL / kILIS V IS = IS * RIS; RIS = 1k nominal RIS > 500
Sense output logic IS
V IS
V Out clamped to VOut(CL) = -15 V typ.
Overvolt. Protection of logic part OUT1...OUT4
+ V bb
V
IN
RI
Logic
Z2
I
IS
Vf
ESD-ZD
IS
V
R
GND
Z1
PR O F ET
GND
IS
R IS
R GND
Sig na l G N D
ESD zener diode: VESD = 6,1 V typ., max. 14 mA ; ON-State: Fault condition so as thermal shut down or current limitation
Sense output logic
V Z1 = 6,1V typ., V Z2 = 47V typ., R GND = 150 , RIS = 1k , R I = 3,5k typ.
Vfault
Vfault
Vf
ESD-ZD
R IS
GND
Vfault = 6 V typ ; Vfault < VESD under all conditions OFF-State diagnostic condition: Open Load, if VOUT > 3 V typ.; IN low
Int. 5V
IS - ST
RIS
GND
ESDZD
ESD-Zener diode: 6,1V typ., max. 5mA; RST(ON) < 375 at 1,6mA.. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
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PCN 2004-018-A: BTS 5440G
Reverse battery protection OUT1...OUT4
- V bb
Vbb disconnect with energized inductive load
V
IN
RI
Z2
high
IN
Vbb PROFET OUT
L o g ic
IS
OUT
IS
V Z1
GND
-I G N D
PROFET
R IS
R Load
Load G N D
R GND
S ig n a l G N D
V
bb
V Z1 = 6,1V typ., VZ2 = 47V typ., RGND = 150 RIS = 1k, RI = 3,5k typ. In case of reverse battery the load current has to be limited by the load. Protection functions are not active.
For inductive load currents up to the limits defined by ZL each switch is protected against loss of Vbb. (max. ratings and diagram on page 12) Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection.
Open load detection, OUT1...OUT4
Off-state diagnostic condition: Open load, if VOUT > 3 V typ.; IN = low
V bb
Inductive load switch-off energy dissipation
E bb E AS
R
E XT
O FF
V OUT
IN
Vbb PROFET OUT
L
ELoad
=
Lo g ic u n it
IS GND
ZL
O p e n lo a d d e tec tio n
{
R L
EL
ER
S ig na l G N D
GND disconnect
Energy stored in load inductance: EL = 1/2 * L * IL2 While demagnetizing load inductance, the energy dissipated in PROFET is EAS = Ebb + EL - ER = VON(CL) * iL(t) dt, with an approximate solution for RL > 0:
OUT
IN
Vbb PROFET
IS GND
V bb
VV IN IS
V GND
E AS =
IL * L IL * R L *(V bb + | V OUT ( CL )| )* ln(1 + ) 2 * RL | V OUT ( CL )|
Any kind of load.
Page 12
2004-Mar-08
PCN 2004-018-A: BTS 5440G
Maximum allowable load inductance for a single switch off (one channel) L =f(IL); Tjstart = 150C, Vbb = 12V, RL = 0
1000
Typ. standby current I bb(off) = f(T j) ; V bb = 16 V ; V IN1...4 = low
16 14 12
100
10 Ibb(off) [A] 8 6 4
ZL(s) [mH]
10
1
2 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [C]
0,1 0 5 10 I L [A] 15 20
Typ. on-state resistance RON = f(V bb,T j); IL = 5 A ; V in = high
30 28 26 24 Ron [mOhm] 22 20 18 16 14 12 0 5 10 15 20 25 30 35 Vbb [V]
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PCN 2004-018-A: BTS 5440G Timing diagrams
All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4. Figure 1a: Switching a resistive load, change of load current in on-condition
IN
VOUT
t on t off
t slc(IS) t slc(IS)
IL
Figure 1c: Behaviour of sense output: Sense current (I S) and sense voltage (V S) as function of load current dependent on the sense resistor. Shown is VS and IS for three different sense resistors. Curve 1 refers to a low resistor, curve 2 to a medium-sized resistor and curve 3 to a big resistor. Note, that the sense resistor may not falls short of a minimum value of 500.
VS
VESD Vfault
3 2 1
Load 1
Load 2
IS,V S
t son(IS)
t
The sense signal is not valid during settling time after turn on or change of load current. tslc(IS) = 300 s typ.
IS
IL
1 2
Figure 1b: V bb turn on
IN
IL(lim)
3
IL
Vbb
IS = I L / kILIS V IS = I S * R IS; RIS = 1k nominal RIS > 500
IL
IS ,V S
proper turn on under all conditions
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2004-Mar-08
PCN 2004-018-A: BTS 5440G
Figure 2a: Switching a lamp
IN
Figure 3a: Short circuit: Shut down by overtemperature, reset by cooling
IN
IS
V
IL
OUT
IL(lim)
I L(SCr)
I
L
t
VS
Vfault
t delayfault
Figure 2b: Switching a lamp with current limit: The behaviour of IS and VS is shown for a resistor, which refers to curve 1 in figure 1c
IN VO U T
Heating up may require several milliseconds, depending on external conditions. IL(lim) = 50A typ. increases with decreasing temperature.
IL
Figure 3a: Turn on into short circuit, shut down by overtemperature, restart by cooling ( channel 1 and 2 switched parallel )
IN 1 /2
IS
VS V fa u lt t
2 x I L (lim ) I L 1 + IL 2 2 x I L (lim )
I L (S C r)
t
o ff(S C )
V fa u lt
t d e la y fa u lt
VS1 , VS2
Page 15
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PCN 2004-018-A: BTS 5440G
Figure 4a: Overtemperature
Reset if T j < Tjt The behaviour of IS and V S is shown for a resistor, which refers to curve 1 in figure 1c.
IN
Figure 6a: Current sense ratio 1)
7000 kILIS
6000
IL
5000
IS tdelay(fault) TJ
4000
[A] IL 0 1 2 3 4 5 6 7 8 9 10 11 12 13
t
Figure 5a:Open-load: detection in OFF-state,
turn on/off to open load. Open load of channel 1; other channels normal opertaion.
IN1
V OUT1
t off
t off
I L1
IS
Vfault
tST delay
tST delay
toff = 250s max.; t ST delay = 500s max.
with pull up resistor at output 1This range for the current sense ratio refers to all devices. The accuracy of the k ILIS can be raised by calibrating the value of kILIS for every single device.
Page 16
2004-Mar-08
PCN 2004-018-A: BTS 5440G Package and ordering code
all dimensions in mm
P-DSO-28-19 Sales Code Ordering Code BTS 5440G Q67060-S6136
Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 Munchen (c) Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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2004-Mar-08

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